Accelerating the 5G User Plane Function

When it comes to 5G, the User Plane Function (UPF) is an essential element of the evolving network development. The CUPS (Control and User Plane Separation) architecture put forth by 3GPP separates the Serving Gateway and PDN Gateway functions into control and data plane components, and the UPF serves as the data path. This approach enables packet processing and traffic aggregation to be handled closer to the network edge. That is where service providers are so focused today as they seek to increase bandwidth efficiencies, reduce latency, and enable service-enhancing capabilities such as network slicing. In this new architectural model, the role that 5G UPF acceleration plays in increasing network efficiencies is receiving a lot of attention, and deservedly so.

For us, at Ethernity, the separation of the control and data planes is native. The fact that 3GPP 5G architecture has addressed this in Release 14, 2017 and operators are starting to implement it today only serves to prove our concept. So how do we handle it? The Ethernity 5G UPF Acceleration solution is to leverage our patented ENET Flow Processor technology along with standard DPDK APIs to offload the data plane to an FPGA-based card. This allows acceleration of the entire 5G network with the lowest possible TCO. We discuss this approach at length in our 5G UPF Acceleration Solution Brief.

Briefly, what we do is use our FPGA-based ACE-NIC SmartNIC, which integrates easily with third-party UPF software networking elements from any vendor, to accomplish several things:

  • Offload user plane data, to release server CPU cores
  • Enhance scalability
  • Assure deterministic performance and improve latency
  • Provide future-ready programmability

3GPP 5G architecture supports disaggregation by enabling the UPF to be placed at the network edge, closer to end-user locations. This allows a service provider to achieve better performance, reduce networking overhead, and lower costs. With a small footprint and low power requirements, the 5G UPF Acceleration solution is truly optimized for edge deployment. In this case, power requirements are extremely important, so our SmartNIC is the perfect product to address the issue, with a super-efficient ratio of performance per Watt.

There is additional support for 5G Quality of Experience, including high bandwidth, low latency, dense connectivity, and multitenancy. The easily programmable data path can quickly adapt to a service provider’s particular requirements and evolve with the ever-changing architectural requirements of the mobile market. Attempting to achieve high data rates with a standard general CPU alone can lead to data loss, packet count loss, and data starvation, so our FPGA-based ENET Flow Processor is an ideal complementary tool to assist x86.

The solution can be implemented via an Ethernity ACE-NIC for accelerating 5G UPF as a virtual network function and for accelerating the NFV infrastructure (NFVI) based on DPDK.

UPF is foundational to a new generation of service-based architectures. As service providers increasingly focus on the network edge and seek to gain efficiencies there, the ability to accelerate UPF through a FPGA-based SmartNIC solution will prove to be a highly valuable tool in their toolbox.