FPGA Questions and Answers – Part II
We’re continuing our review of questions that we frequently receive about FPGAs at trade shows and in industry conversations. We addressed some of the more basic questions in our previous post, and this time, we’re getting into some of the deeper and more thoughtful questions. For instance:
Do FPGAs cost more than ASIC solutions because of their programmability and other features?
For a long time, FPGAs were a more expensive option, but that difference in costs is quickly vanishing in the face of the economies of scale achieved through increased FPGA production. Initially they were used primarily for prototyping ASICs. However, the growing usage of FGPAs in so many different industries has driven their prices down drastically. The same FPGAs can be programmed for completely different functions for different applications in varied markets, while each ASIC, in contrast, is designed for a specific task for a specific market only. In addition, ASIC production requires an expensive and lengthy development process that actually makes them the more expensive option except when produced in extremely large quantities.
Can we expect the decline in FPGA prices to continue?
Yes, because as FPGA production continues to accelerate, the per-unit cost descends. Also, as more FPGA manufacturers enter the market, competition will drive down prices. In addition, Ethernity’s patented technology reduces the space required for functional logic on an FPGA by up to 80 percent, enabling the use of much smaller, less-expensive FPGAs for the same high level of production.
Are FPGAs truly an open technology?
Absolutely. There are multiple FPGA manufacturers – Xilinx, Intel, Microchip, Lattice Semiconductor, and Achronix to name a few – and it is relatively easy to port code for one product to another through the development cycle. That cycle, by the way, is drastically shorter and simpler than an ASIC development cycle, and completely open.
What is the value of FPGAs when it comes to evolving central offices into virtual central offices?
FPGA-based SmartNICs can overcome the tradeoff between limited space and power on the one hand and the need to accommodate thousands of devices on the other. They can slot into existing servers, reducing the need for additional boxes and saving space. With multiple SmartNICs residing in a single server for ultimate space efficiency, there is a significant reduction in power requirements.
In addition, the scalability of FPGA SmartNICs enables service providers to more easily handle large numbers of subscribers and devices at cost. They also enhance edge security by enabling network isolation and user segregation to prevent attacks on edge sites and user devices. Finally, their deterministic performance and low latency aid the responsiveness necessary for edge networking and applications.
What specific role do FPGAs play in overcoming power and space limitations in remote sites?
The ability of FPGA-based SmartNICs to be placed into existing servers reduces the need for additional equipment and preserves valuable space. And because multiple SmartNICs can reside in a single server, the overall power requirements are reduced significantly. For example, the 100G ACE-NIC100 SmartNIC consumes only 32 Watts of power while a server-based 100G virtual router can consume more than 1000 Watts, depending on the specific server configuration.
Where can FPGAs provide the greatest value in networks?
Their programmability, efficiency, and potential to reduce costs make a clear business case in favor of FPGAs. Because they are programmable, FPGAs don’t have to be “reinvented” every couple of years to keep up with technological advancements, as is the case with ASICs. And since Ethernity’s patented technology reduces the required logic space within the FPGA by up to 80 percent to allow the use of much smaller FPGAs, it makes them an even better value. FPGAs are the solution for an elastic network that efficiently meets the demands of modern networking.
Are FPGAs more secure than other options?
FPGAs are not inherently more secure than ASICs or CPUs, except that they are, for the time being, less commonly deployed. A case can be made that hardware-based solutions are harder to breach than software-based ones. Ultimately, though, security depends on the programming. A perfect example is the new Ethernity VPN Gateway, in which we have programmed the FPGAs in this solution to enable Host Bypass, with traffic isolated exclusively within the FPGA. That makes it much harder for either the traffic itself or the host to be hacked.
Performing cryptographic functions inline provides more robust security at a lower solution cost by eliminating the need to send traffic between the CPU and an encryption engine. In addition to implementing the encryption engine within the FPGA, Ethernity enables full packet editing within the FPGA. By combining both inline encryption and complete packet editing, there is no need to send data from the FPGA to the CPU. This ensures greater security, since the traffic flow is isolated within the FPGA.
Why is FPGA-based hardware offloading said to be particularly effective?
Network functions require higher processing power, low latency, and deterministic behavior, which can cause CPU cores to overload, even despite optimization methods. The solution is to accelerate the data path through offloads to hardware, and the FPGA is the best way to accomplish this. With an FPGA SmartNIC, one can achieve complete network processing offload to the hardware, which produces top performance, monitoring, load balancing, fault management, and security capabilities at a fraction of the CPU overhead. Any network function data plane can be offloaded to the programmable FPGA.