Ethernity Networks Heads To 50% Increase of FP Pipeline Performance

Ethernity Networks has successfully passed the code synthesis for the company’s career grade switch/router on the new Xilinx’s MPSoC devices that combine a quad-core ARM® Cortex-A53 platform running up to 1.5GHz, dual-core Cortex-R5 real-time processors and 16nm FinFET+ programmable logic. MPSoC devices feature specialized processing elements that answer the performance needs of NG wired and 5G wireless infrastructures and cloud computing, as well as applications with high demand for robustness and security, like aerospace and defense.
By bringing the highest possible clock rate and using DDR4 64 bit controllers, Ethernity Networks will increase at least by 50% performance at the flow processor pipeline. It will allow reaching up to 60Gbps data throughput using single ENET core, and 120Gbps using dual ENET core instantiation. The Improved throughput can pass through the DDRs for external buffering of up to 100ms. “We are going to use this solution for novel SDN/NFV market products, including embedded SR-IOV, and for high density port solutions,” – said CEO of Ethernity, David Levi.